可编程逻辑器件
我对 PAL 设备的结构理解很困惑。
我的第一个问题是，如果我们购买 PAL 设备，那么我们如何知道 OR 数组中的每个 OR 门添加了多少个最小项？换句话说，我想问的是，是否有任何标准可以让我们知道每个“或”门在“或”数组中的输入数量？
接下来，我们在 PAL 设备中有一个可编程的 AND 数组。现在假设我们有 4 个输入，那么 AND 数组中的每个 AND 门必须需要 8 个输入。应用多少个变量取决于我们，但我们有可能将所有变量应用到与门上，因此它应该有 8 个输入。请告诉我我对还是错。如果没有，请解释一下。
I have a confusion in understanding the structure of PAL device.
My first question is that if we buy a PAL device , then how can we know that how many min terms are added by each OR gate in the OR array? In other words I am asking, is there any standard by which we can know the number inputs each OR gate has in the OR array?
The next thing is that we have an AND array in the PAL device which is programmable. Now suppose we have 4 inputs , then each AND gate in the AND array must need 8 inputs. It is up to us how many variables we apply on it, but there is a possiblity that we can apply all the variables on the AND gate therefore it should have 8 inputs. Please tell me am i right or not. If not then please explain.
如果你对这篇内容有疑问，欢迎到本站社区发帖提问 参与讨论，获取更多帮助，或者扫码二维码加入 Web 技术交流群。
绑定邮箱获取回复消息
由于您还没有绑定你的真实邮箱，如果其他用户或者作者回复了您的评论，将不能在第一时间通知您！
发布评论
评论（1）
我认为你的任何一个问题都没有通用标准。每个器件的数据表都指定了这些参数。您应该查找数据表并决定什么适合您的需求。
具体来说，关于你的第二个问题，理想的 PAL 应该如你所说（就像这样 简化电路）。但通常您不想将所有变量（及其否定）应用于与门，因此每个与门可以有更少的输入（当然，使用网格您可以选择要应用的任何变量，只是不是所有变量）他们在一起）。
I think there is no universal standard for either of your questions. The data-sheet for each device specifies those parameters. You should look up the data-sheets and decide what suits your needs.
Specifically on your second question, an ideal PAL should be as you say (like this simplified circuit). But usually you don't want to apply all the variables (and their negations) to the AND gates, so each AND gate can have less inputs (of course using the grid you can choose any of the variables to apply, just not all of them together).