fpga：选择 c++对 FPGA 进行编程
我经常从电气工程师那里听到，C 用于 fpga 工作。
那么 C++ 呢？使用 C++ 有什么缺点吗？我认为 C++ 比 C 更能满足硬件编程时所需的并行性，不是吗？
另外，之后我应该使用什么来使 C++ 与硬件兼容？
I keep hearing mostly from electrical engineers that C is used for fpga work.
What about C++? Are there any disadvantages to using C++? I would think that the parallelism desired when programming for hardware would be better served by C++ more than C, no?
Also what do I use after that to make compatible c++ with the hardware?
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我非常确定 FPGA 是用 VHDL 或 Verilog 编程的。
http://en.wikipedia.org/wiki/Vhdl
http://en.wikipedia.org/wiki/Verilog
我知道 Altera 还提供了一些 C 到 HDL 的转换器。我怀疑它们除了微小的设计之外是否还能用于其他用途。
I'm pretty sure that FPGAs are programmed either in VHDL or Verilog.
http://en.wikipedia.org/wiki/Vhdl
http://en.wikipedia.org/wiki/Verilog
I know that Altera also offers some C to HDL translators. I doubt that they are usable for anything but tiny designs though.
到目前为止，对 FPGA 进行编程的最简单方法是通过 LabView 的 FPGA 模块。然而，这也将您与他们的硬件和软件联系在一起。这不是一个便宜的解决方案，但无疑是在硬件中获取程序的最快方法，无需学习 LabVIEW 以外的任何内容。
By far and away the easiest way to program an FPGA is via LabView's FPGA module. However this also ties you into their hardware and software. Not a cheap solution, but certainly the fastest way to get your program in hardware without having to learn anything but LabVIEW.
您可以使用 C 或 C++ 对 FPGA 进行编程，但它需要一些非常昂贵的高级综合软件。 CatapultC 是 Mentor Graphics 的一款产品，它允许您用不定时的 C++ 编写算法。然后，它将 C++ 综合为 RTL VHDL 或 Verilog。但 CatapultC 的售价远远超过 100,000 美元，因此它绝对不适合业余爱好者。还有另一个名为 ImpulseC 的产品，它允许您编写 C 代码，然后将其合成为 RTL，但我很确定它只处理 C 而不是 C++。 ImpulseC 大约是 2000 美元。
对于爱好者来说，您可能最好坚持使用 VHDL 或 Verilog 来描述您的设计，然后使用 Xilinx 或 Altera 的免费工具来综合该代码并对 FPGA 进行编程。
You can use C or C++ to program FPGAs but it requires some very expensive Highlevel Synthesis software. CatapultC is a product from Mentor Graphics which allows you to write your algorithm in untimed C++. It then synthesizes that C++ into RTL VHDL or Verilog. But CatapultC sells for well over $100,000 so it's definitely not for hobbyists. There's another product called ImpulseC which allows you to write C code which then gets synthesized into RTL, but I'm pretty sure that it only handles C not C++. ImpulseC is about $2000.
For hobbyists, you're probably best off sticking with VHDL or Verilog to describe your design and then using the free tools from Xilinx or Altera to synthesize that code and program the FPGA.
针对 CPU 的编译和针对 FPGA 的编译之间存在很大差异。 “普通”编译器生成二进制程序代码。特殊的 FPGA 编译器生成“硬件”。有些编译器可以将一些类似 C 的代码转换为“硬件”。但它并不完全是 C。它可能是用任意位长度的整数类型扩展的 C 衍生品，并且可能仅限于迭代和非递归函数调用。
我是 C++ 的忠实粉丝，但即使我也发现它的许多部分并不适合 FPGA：虚拟函数、RTTI、异常。至少这是我的印象。我自己没有测试过那些类似 C 的 FPGA 编译器，但我的一个朋友使用过它们，据说它是 PITA。
There is a big difference between compiling for CPUs and compiling for FPGAs. "Normal" compilers generate binary program code. The special FPGA compilers generate "hardware". There are compilers out there that turn some C-like code into "hardware". But it's not exactly C. It may be a C derivative extented with integer types of arbitrary bit lengths and is probably restricted to iteration and non-recursive function calls.
I am a big fan of C++ but even I see that many parts of it are just not appropriate for FPGAs: virtual functions, RTTI, exceptions. At least that's my impression. I didn't test those C-like FPGA compilers myself but a buddy of mine worked with them and it's supposedly a PITA.
他们可能使用 C 语言与 FPGA 进行交互。在设计课程中，我们使用 Verilog 对附带的 Linux 板中的 FPGA 和 C 进行编程。在这种情况下，他们可能会使用 C，因为用 C 编写小程序比用 C++ 更容易。
They're probably using C to interface with the FPGA. When working with one in a design class, we used Verilog to program the FPGA and C in the attached Linux board. In that case, they're likely using C as it's easier to bang out a small program in C than in C++.
您可能正在谈论 SystemC，它是一组主要用于 (事务级）建模，不适用于综合。然后，高级模型可以用作验证寄存器传输级 (RTL) 描述的黄金参考，该描述通常以 VHDL 或 Verilog 进行编码。
You're probably talking about SystemC, which is a set of C++ classes and macros used mainly for (transaction-level) modeling, not for synthesis. The high-level model can then be used as a golden reference to verifiy the register transfer level (RTL) description, which is typically coded in VHDL or Verilog.
和你们中的一些人一样，我也是 C++ 的粉丝。我认为使用 SystemC 与 fpga 一起工作会很棒。因此，我在寻找时找到了下一页。也许你们中的一些人可能会感兴趣。
http://www.es.ele。 tue.nl/~ljozwiak/education/5JJ70p/blocks/4/sc2fpgaflow.html
as some of you I'm a fan of C++. I think it would be great to use SystemC to work with fpga's. So looking for that I found the next page. Maybe it could interest some of you.
http://www.es.ele.tue.nl/~ljozwiak/education/5JJ70p/blocks/4/sc2fpgaflow.html
正如其他人所说，大多数 FPGA 都是使用 VHDL 或 Verilog。我还看到 PALASM 几年前用于小型设计。设计是一种逻辑描述，可转换为配置 FPGA 的设置。 Verilog 基于 c，因此了解 c 将有助于学习 verilog，但是 FPGA 本质上是并行的，因此即使语法可能看起来相似，也没有太多其他翻译。
Like others have said most FPGA's are designed using VHDL or Verilog. I have also seen PALASM used several years ago for small designs. The design is a logic description that is converted to settings that configure the FPGA. Verilog is based on c so knowing c will help with learning verilog however FPGAs are by nature parallel so even though the syntax might look similar not much else translates.
您所指的是“行为综合”，这是一种编译技术，允许将顺序代码作为输入（C、SystemC、C++）并在 VHDL 或 Verilog 中自动生成 FSM+Datapath 对，然后可以使用常规 Xilinx 进行综合或 Altera 合成器。
迄今为止，有许多“行为合成器”：
希望这会有所帮助
What you are referring to is "behavioral synthesis", a compilation technique that allows to take sequential code as input (C, SystemC, C++) and generate automatically a FSM+Datapath pair in VHDL or Verilog, that can then be synthesized using regular Xilinx or Altera synthesizers.
To date, there are many "behavioral synthesizers" :
Hope this helps
我能立即想到的两个：C++ 编写编译器（在本例中为 HDL 翻译器）要复杂得多，并且具有太多功能，这些功能在 fpga 编程所需的低级编程中没有用处。 。
Two that I can think of off the top of my head: C++ is much more complicated to write compilers (in this case HDL translators) for and has too many features that just would not be useful in such low level programming as fpga programming calls for.
他们可能正在谈论像 Handel-C 这样的编程语言，它是某种 C 方言，针对硬件编程。 Handel-C 可以直接或间接编译为 HDL，HDL 又创建 FPGA 配置（即 FPGA 上的“程序”）。
虽然 VHDL 和 Verilog 更难学，但我建议你立即开始。当您从事 FPGA 相关工作时，您通常会对效率感兴趣。 Handel-C 编写的代码很可能比手工编写的代码（用 VHDL 或 Verilog）效率低。
编辑：我没有领导过 Handel-C 或相关编译器的 C++ 变体。
They might be talking about a programming language like Handel-C, which is some kind of C dialect, targeted for hardware programming. Handel-C can be directly or indirectly compiled to HDL, which in turn creates an FPGA configuration (i.e., the "program" on an FPGA).
Although VHDL and Verilog are much harder to learn, I suggest you start right away. When you're doing FPGA-related stuff, you're usually interested in efficiency. Handel-C will most likely make less efficient code than the code that you can write by hand (in VHDL or Verilog).
Edit: There's no C++ variant of Handel-C or related compilers I have ever head of.
您可以使用 C/C++ 对 FPGA 进行编程。 Xilinx 拥有 SDSoC，这是一种基于 eclipse 的工具，可使用 C/C++ 对 FPGA 进行编程。这基本上为标记为要合成的部分代码构建了硬件加速器。这假设基于 ARM+FPGA 的 zynq 设备，主机代码在 ARM 上运行。
还有另一个用于基于 PC 的解决方案的流程 SDAccel。在 X86 和 X86 上使用主机代码连接到 PCIe 插槽的 FPGA 加速器。
You can use C/C++ to program FPGAs. Xilinx has SDSoC, an eclipse based tool to program your FPGAs using C/C++. This basically builds hardware accelerator for part of code flagged to be synthesized. This assumes ARM+FPGA based zynq devices, host code is running on ARM
There is another flow SDAccel for PC based solution. With host code on X86 & accelerator on FPGA connected to your PCIe slot.
FPGA 代码描述硬件。这意味着您设计一个数字系统，然后使用代码向编译器“描述”硬件。这主要是用VHDL或Verilog完成的。
现代编译器提供软件和硬件平台之间的接口，让您可以编写可在 FPGA 上运行的 C 代码。它并不是真正要上传到 FPGA 的代码，而只是让编译器根据您的 C 代码为 FPGA 生成代码。对于最佳系统，需要有一名硬件工程师可以对编译器生成的代码进行更改。
这是一篇关于这个问题的好文章： https://www.eetimes.com/c-language-techniques-for-fpga-acceleration-of-embedded-software/#
有一些程序，例如 Intel Monitor Program，可以让您在 FPGA 上运行 C 代码，但是它的作用是使用芯片上已有的微处理器创建一个“计算机”，让您看到代码是如何工作的。它更多的是一个学习工具。
FPGA code describes hardware. What that means is you design a digital system and then use code to "describe" the hardware to the compiler. This is mainly done in VHDL or Verilog.
Modern compilers provide inerfaces between software and hardware platforms to let you write C code that can be run on FPGAs. Its not really code that will be uploaded to the FPGA but merely lets the compiler make code for the FPGA based on your C code. For an optimal system, there will need to be a Hardware Engineer who can make changes to the compiler generated code.
Here's a nice article on the issue: https://www.eetimes.com/c-language-techniques-for-fpga-acceleration-of-embedded-software/#
There are some programs like Intel Monitor Program which let you run C code on FPGAs but what it does is create a 'Computer' using the Microprocessor already on Chip to let you see how the code works. Its more of a learning tool.
不确定是否已经说过（我没有阅读所有回复），但您所听到的可能是软核中正在运行的软件...例如 Altera 有 Nios II，它可以运行 Linux内核 (uCLinux)，它将允许一些预加载的 C 程序在该软核上运行，而软核又与 FPGA 进行通信。因此，FPGA 的硬件端仍将使用 VHDL/Verilog 进行编程，然后在软核操作系统上运行的小型应用程序可以访问其保存的任何数据。我确信只要 uCLinux/任何正在运行的内核支持该语言，C++ 就会被允许。
～狡猾的
Not sure if this has been said yet (I didn't read all the responses) but it is a possibility that what you are hearing is a running software in a soft core... For instance Altera has Nios II which can run a linux kernel (uCLinux) which will allow some pre-loaded C programs to run on that soft core which in turn communicates with the FPGA. So an FPGA will still be programmed with VHDL/Verilog for the hardware side, then whatever data it holds could be accessible to a small app running on the OS in the soft core. I'm sure C++ would be allowed so long as uCLinux/whatever kernel is running supports the language.
~doddy
通常，您可以使用 C++ 和 C 获得更大的标准库，并且 C 更接近硬件的操作方式，即对于电气工程师来说更容易。
You usually get a larger standard library with C++ and with C, and C is closer to the way that the hardware operates, i.e. easier for electrical engineers.