如何从VHDL中的rom_type读取数据？
如何从 rom_type 读取数据？
entity my_rom is
port(
addr: in std_logic_vector(3 downto 0);
data: out std_logic_vector(0 to 7)
);
end my_rom;
architecture a of my_rom is
type rom_type is array (0 to 7) of std_logic_vector(0 to 7);
constant R1_ROM: rom_type :=
(
-- data
);
begin
data <= R1_rom(conv_integer(addr));
end a;
How can I read data from rom_type?
entity my_rom is
port(
addr: in std_logic_vector(3 downto 0);
data: out std_logic_vector(0 to 7)
);
end my_rom;
architecture a of my_rom is
type rom_type is array (0 to 7) of std_logic_vector(0 to 7);
constant R1_ROM: rom_type :=
(
-- data
);
begin
data <= R1_rom(conv_integer(addr));
end a;
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评论（1）
您正在使用 conv_integer，它不是原始 VHDL 的一部分......它位于库中。但是，您不想使用它 - 它来自非标准库。
相反，
use ieee.numeric_std.all;是您在实体之前需要的。然后使用 to_integer(unsigned(addr)) 来索引 ROM。更好的是，将地址作为无符号向量传递，甚至直接作为整数传递。尝试摆脱使用 std_logic_vector（只是一包位）来表示数字的习惯，并使用定义明确的数字类型。
或者使用 Verilog，它并不关心:)
我自己，我更喜欢 VHDL 的强类型，以防止我愚蠢的脚步射击......
You are using
conv_integer, which is not part of raw VHDL... it's in a library. However, you don't want to use it - it's from a non-standard library.Instead
use ieee.numeric_std.all;is what you need before your entity. Then useto_integer(unsigned(addr))to index the ROM. Better still, pass the address in as anunsignedvector, or even directly as aninteger.Try to get out of the habit of using
std_logic_vector(which is just a bag of bits) to represent numbers, and use the well-defined numerical types.Or use Verilog, which doesn't care :)
Myself, I prefer VHDL's strong-typing to keep me from daft foot-shooting...