makefile 基本上与批处理文件相同吗？
我了解所有关于批处理文件并以前制作过它们的信息，但我不清楚 makefile 是什么。它看起来像一个批处理文件。有哪些相同点和不同点？
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我了解所有关于批处理文件并以前制作过它们的信息，但我不清楚 makefile 是什么。它看起来像一个批处理文件。有哪些相同点和不同点？
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Makefile 是 Make 程序的数据。将它们视为老家伙们在拥有 XML 之前所做的事情:)
Makefiles are data for the Make program. Think of them as what the old guys did before they had XML :)
类似，是的，除了依赖关系、拓扑排序、宏处理和专家系统。
如果你什么都不做，只是将 shell 命令放在 Makefile 中，那么它实际上很像一个目录“批处理文件”，并且当指定其关联的命名目标时，它会执行每个批处理文件。
然而，更典型的做法是在 makefile 中指定依赖关系图，在这种情况下，make会执行对所有依赖项进行拓扑排序，以便巧妙地仅构建一次所有内容并以正确的顺序开始具有最早的先决条件。
为了完整起见，我应该补充一点，make也是一个宏处理器。它面向软件构建系统，因此它提供了对其问题域中的符号元素的处理，例如源和目标的名称。
现在，make 并不是具体一个通用的专家系统，1但它所做的不仅仅是打包 shellcode，而且从技术上来说它确实符合专家系统的定义。
Make 包含一个推理引擎。所有版本的 make 都有后缀规则< /a>，某些版本还实现模式规则。与您的规范（更多规则，通常是定义软件应用程序的规则）结合使用时，结果是 专家系统将决定需要在eBay，无论如何，一切都取决于您提供的数据和命令。
1. It's an *easy-to-use* expert system, instead. Skynet will probably not emerge from an accidental typo in a complicated Makefile.
Similar, yes, except for the dependencies, the topological sort, the macro processing, and the expert system
If you do nothing but put shell commands in a Makefile then it is in fact a lot like a catalog of "batch files," and it executes each one when its associated named target is specified.
However, it is more typical to specify a graph of dependencies in a makefile, in which case make does a topological sort of all the dependencies in order to cleverly build everything only once and in the right order starting with the earliest prerequisites.
And to be complete, I should add that make is also a macro processor. It's oriented towards software build systems, so it provides handles on symbolic elements in its problem domain, such as the names of sources and targets.
Now, make is not specifically a general purpose expert system,1 but it does do more than just package up shellcode, and technically it does fit the expert system definition.
Make contains an inference engine. All versions of make have suffix rules, some versions also implement pattern rules. When combined with your specification (more rules, typically ones defining a software application) the result is an expert system which will decide what needs to be compiled, linked, purchased on eBay, whatever, all depending on the data and commands you have provided.
1. It's an *easy-to-use* expert system, instead. Skynet will probably not emerge from an accidental typo in a complicated Makefile.
不会。makefile 有一些特殊的规则，这些规则涉及文件如何相互依赖。它不一定按照编写的顺序执行。
批处理文件是一系列命令和控制语句。
Makefile 通常包含与批处理文件相同的内容，但批处理文件没有直接指示依赖性的方法，也没有提供将一种文件处理为另一种文件的推断方法。
No. A makefile has special rules which relate how files depend on each other. It does not necessarily execute in the order it is written.
A batch file is a sequence of commands and control statements.
Makefiles often contain the same things as batch files, but batch files do not have a direct way of indicating dependencies or provide an inferred method of processing one kind of file into another kind.
进行一个相当抽象的解释：
To put a fairly abstract spin on it:
Makefile 列出了执行的命令，但它们的结构与顺序命令列表不同。相反，他们有目标和“制定”目标的命令。然后，
make检查列出的依赖项，并查看需要更新哪些目标才能实现您指定的功能。有许多隐式规则（给定 *.c 文件，make 已经知道如何将其编译为 *.o，甚至构建可执行文件！）和标准变量（例如 CFLAGS），因此您可以利用它来发挥自己的优势。而且，与手册页相反，您可以在没有Makefile的情况下使用这些隐式规则。最简单的思考方法是 makefile 说明如何在给定“B”的情况下生成“A”，然后告诉 make 你想要做什么（例如
make all）而不是如何去做。它计算出各个步骤。Makefiles list commands which are executed, but they're structured differently than a list of sequential commands. Instead they have targets and the commands to 'make' them.
makethen checks the listed dependencies and sees what targets it needs to update to make what you told it to. There are many implicit rules (given an *.c file make already knows how to compile it to an *.o and even build an executable!) and standard variables (e.g. CFLAGS) so you can use this to your advantage. And, contrary to the man page, you can use these implicit rules without aMakefile.The simplest way to think about it is the makefile says how to make an 'A' given a 'B', and then you tell make what you want to do (e.g.
make all) rather than how to do it. It figures out the individual steps.一点也不。它们的相似之处在于所有编程语言都相似（更是如此，因为它们都是脚本语言），但它们的用途却截然不同。
makefile 的目的是描述如何构建项目。这通常意味着创建规则（用特殊语言），这些规则如下：
当然，这是一个简单的描述。
使用 make（makefile 语言的“解释器”）的主要好处是，您可以获得专门为此类事物构建的语法。例如，make 通常会处理诸如检查文件是否已更改之类的事情，以便您不会编译没有任何更改的文件。
Not at all. They're similar in the sense that all programming languages are similar (even more so since they're both scripting), but they have very different purposes.
The purpose of makefiles is to describe how to build a project. This usually means creating rules (in a special language) that say things like:
Of course this is a simplistic description.
The main benefit of using make (the "interpreter" for the makefile language) is that you get a syntax which is purpose-built for these kinds of things. For example, make usually takes care of things like checking whether a file has changed, so that you don't compile a file that doesn't have any changes.
非常有趣的问题。通过 shell 脚本或批处理文件，您可以为计算机提供要按顺序遵循的指令列表。它从顶部开始，向下移动，直到到达末端，然后停止。好吧，可能会有函数定义、循环和 goto 改变事情发生的确切顺序，但基本上来说，文件的进度是线性的。
另一方面，Makefile 提供了一系列关于如何从某些其他内容创建某些内容的说明。当您调用
make时，您告诉它您想要什么，它会分析它所拥有的指令并决定需要执行哪些指令才能实现您指定的目标。因此，当您调用 makefile 时发生的情况不仅取决于文件本身的内容，还取决于您要求它生成的内容以及文件当时所处的状态。做两件不同事情的两种不同方法。
Very interesting question. With a shell script or batch file, you are providing your computer with a list of instructions to follow in order. It starts at the top, works down until it reaches the end, and then stops. OK, there might be function definitions, loops and gotos which change the exact order in which things happen, but largely speaking the progress through the file is linear.
Makefiles, on the other hand, provide a series of instructions on how to make certain things from certain other things. When you call
make, you tell it what you want, and it analyses the instructions which it has and decides which of them it needs to execute in order to make your specified target. As a result, what happens when you call a makefile depends not just on the content of the file itself, but on what you asked it to make and what state your files are in at that point.Two different approaches for doing two different things.