如何评估设计类似内核的 FPGA 利用率？
我正在考虑使用一些老一代 FPGA 来与遗留系统连接。因此，我想要一种好方法来估计在给定晶体管数量的情况下更换 ASIC 所需的空间。
- Verilog 与 VHDL 会影响利用率吗？ （根据我们的一位承包商的说法，它会影响时间，因此利用率似乎是可能的。）
- 不同供应商的零件对此有什么影响？ （例如，Actel 的架构与 Xilinx 的架构显着不同。我期望基于此进行一些“权重”。）
I was considering some older generation FPGA's to interface with a legacy system. So I want a good way of estimating how much space is necessary to replace an ASIC given its transistor count.
- Does Verilog versus VHDL affect the utilization? (According to one of our contractors it affects the timing, so utilization seems likely.)
- What effect do different vendor's parts have on it? (Actel's architecture is significantly different from Xilinx', for example. I expect some "weighting" based on this.)
如果你对这篇内容有疑问，欢迎到本站社区发帖提问 参与讨论，获取更多帮助，或者扫码二维码加入 Web 技术交流群。
绑定邮箱获取回复消息
由于您还没有绑定你的真实邮箱，如果其他用户或者作者回复了您的评论，将不能在第一时间通知您！
发布评论
评论（2）
此讨论最初来自 comp.arch.fpga 似乎表明它非常复杂，包括诸如您要求 VHDL（或 verilog）编译器进行空间与速度权衡等因素。当您认为 VHDL 是源代码而 FPGA 实现是目标代码时，您就会明白为什么它不简单。
“FPGA 与 ASIC” 指出“为在 FPGA 上良好运行而创建的设计在 ASIC 上通常很糟糕，为 ASIC 创建的设计可能根本无法在 FPGA 上工作（当然在原始频率下）”。
在 Google 上搜索 FPGA ASIC 门可能会提供更多有用的信息。
This discussion originally from comp.arch.fpga seems to indicate that it's pretty complicated, including factors such as what space vs. speed tradeoffs you've asked the VHDL (or verilog) compiler to make, etc. When you consider that VHDL is source code and an FPGA implementation of it is object code, you'll see why it's not straightforward.
"FPGA vs. ASIC" notes that "a design created to work well on an FPGA is usually horrible on an ASIC and a design created for an ASIC may not work at all on an FPGA (certainly at the original frequency)".
A Google search for FPGA ASIC gates may have more useful info.
Verilog 与 VHDL 在速度或利用率方面几乎没有真正的差异。它与您必须键入的代码量（对于 VHDL 更多）以及强类型与弱类型更相关。
FPGA 供应商的营销门槛过高。 Altera 与 Xilinx 的利用率相似。查看内存（如果内存密集）和触发器的数量；这可能就足够了。
考虑类似的核心需要什么，例如，如果您需要执行错误编码核心，请查看 Reed-Solomon 核心。
Verilog vs. VHDL has little real difference on speed or utilization. It is more related to amount of code you have to type (more for VHDL) and strong vs weak-typing.
The marketing gates for FPGA vendors are inflated. Altera vs. Xilinx are similar utilization. Look at memories (if memory intensive) and number of flip-flops; that will likely be good enough.
Consider what a similar core requires, for example if you need to do an error-coding core, look at a Reed-Solomon core.