I'm unsure if there's a library which can match your purpose. I can give you some pointers on the implementation though:
The basis of your implementation will be a LFSR. You can implement one in two ways:
The Fibonacci implementation consists of a simple shift register in which a modulo-2 sum of the binary-weighted taps is fed back to the input (remember that mod-2 sum is equivalent to addition without carry, which is in turn equivalent with XOR).
The Galois implementation consists of a shift register, the content of which is modified at every step by a binary-weighted value of the output stage, again using modulo-2 math. The order of the Galois weights is opposite that of the Fibonacci weights. The Galois form is generally faster due to the reduced amount of logic in the feedback loop.
For more information on how taps are specified and what sequences you can obtain you can start here. Note that your implementation choices above can have the same cycle length and sequence of output bits for an appropriate choice of initial states (seeds).
That's your basic requirement right there. LFSRs have output streams that are very uniformly distributed and sufficiently long periods. I'd suggest not to use it for cryptographic purposes, as it's extremely weak - being a linear system. There are workarounds, but nothing substantial except the shrinking generator (which I find extremely cool).
Links to implementations have already been given, so good luck!
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我不确定是否有一个图书馆可以满足您的目的。 不过，我可以为您提供一些有关实现的指导：
您的实现的基础将是 LFSR。 您可以通过两种方式实现：
有关如何指定抽头以及可以获得哪些序列的更多信息，您可以从此处开始。 请注意，您上面的实现选择可以具有相同的循环长度和输出位序列，以适当选择初始状态（种子）。
这就是你的基本要求。 LFSR 的输出流分布非常均匀且周期足够长。 我建议不要将它用于加密目的，因为它非常弱 - 作为一个线性系统。 有一些解决方法，但除了收缩生成器（我觉得非常酷）之外，没有什么实质性的。
已经给出了实现的链接，祝你好运！
I'm unsure if there's a library which can match your purpose. I can give you some pointers on the implementation though:
The basis of your implementation will be a LFSR. You can implement one in two ways:
For more information on how taps are specified and what sequences you can obtain you can start here. Note that your implementation choices above can have the same cycle length and sequence of output bits for an appropriate choice of initial states (seeds).
That's your basic requirement right there. LFSRs have output streams that are very uniformly distributed and sufficiently long periods. I'd suggest not to use it for cryptographic purposes, as it's extremely weak - being a linear system. There are workarounds, but nothing substantial except the shrinking generator (which I find extremely cool).
Links to implementations have already been given, so good luck!
用于网络的 PRBS 模式通常使用线性反馈移位寄存器来完成。 也许用软件模拟其中之一就足够了。
PRBS patterns for networking is often done using Linear Feedback Shift Registers. Perhaps simulating one of these in software would suffice for you.
这是 koders.com 上的一个
Here is one on koders.com