如何正确地使我的makefile编译并运行?

发布于 2024-07-21 23:43:27 字数 673 浏览 3 评论 0原文

这个问题可能不是描述我的问题的最佳问题,但我想不出更好的问题。 我的 makefile 是这样的:

PROGRAM_NAME = prog

OBJECT_FILES = $(PROGRAM_NAME).o
CFLAGS = -O2 -Wall -g

$(PROGRAM_NAME) : $(OBJECT_FILES)
    gcc $(CFLAGS) -o $@ $(OBJECT_FILES)

$(PROGRAM_NAME).o : $(PROGRAM_NAME).c data.h
    gcc $(CFLAGS) -c $<

clean :
    $(RM) $(PROGRAM_NAME)
    $(RM) $(OBJECT_FILES)
    $(RM) *~ *.bak

run :
    @$(MAKE) && ./$(PROGRAM_NAME) $(ARGS)

当我想编译和运行时,我只需执行“make run”。 问题是我的程序处理 Ctrl+Z 产生的信号,如果我用“make run”启动我的程序,信号将被发送到“make run”而不是我的程序本身。

基本上,调用“make run”与直接调用“make && ./prog”不同,因为在第一种情况下,除非“prog”首先终止,否则“make run”不会终止。

有没有解决的办法?

The question is probably not the best one to describe my issue but I couldn't think of a better one. My makefile goes like this:

PROGRAM_NAME = prog

OBJECT_FILES = $(PROGRAM_NAME).o
CFLAGS = -O2 -Wall -g

$(PROGRAM_NAME) : $(OBJECT_FILES)
    gcc $(CFLAGS) -o $@ $(OBJECT_FILES)

$(PROGRAM_NAME).o : $(PROGRAM_NAME).c data.h
    gcc $(CFLAGS) -c 
lt;

clean :
    $(RM) $(PROGRAM_NAME)
    $(RM) $(OBJECT_FILES)
    $(RM) *~ *.bak

run :
    @$(MAKE) && ./$(PROGRAM_NAME) $(ARGS)

When I want to compile and run I just do "make run". The issue with this is that my program handles the signal produced by Ctrl+Z and if I start my program with "make run", the signal will be sent to "make run" and not my program itself.

Basically, calling "make run" is not the same thing as calling directly "make && ./prog" because in the first case, "make run" will not terminate unless "prog" terminates first.

Is there a way around this?

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评论(5

染火枫林 2024-07-28 23:43:27

您可以通过让“运行”目标取决于您的程序是否是最新的来简化您的“运行”目标,然后简单地运行该程序:

run:    ${PROGRAM_NAME}
        ./${PROGRAM} ${ARGS}

当您已经运行 时,运行 make 没有多大意义>make - 至少在这种情况下不是。 也许用于递归操作(在不同的目录中),但请参阅“递归使被认为有害'。

另外,您的 makefile 通常应该提供一个目标“all”,并且它通常应该是第一个目标,因此也是默认目标。

You can simplify your 'run' target by having it depend on whether your program is up to date, and then simply run the program:

run:    ${PROGRAM_NAME}
        ./${PROGRAM} ${ARGS}

There's not much point in running make when you're already running make - at least, not in this context. Maybe for recursive operations (in different directories), but see 'Recursive Make Considered Harmful'.

Also, your makefile should normally provide a target 'all' and it should normally the first and therefore default target.

将军与妓 2024-07-28 23:43:27

从 makefile 运行有点不寻常。 也许您正在尝试复制某些 IDE 提供的“编译并运行”菜单项? Make 没有足够的能力来做到这一点。

目标命令中发生的所有事情都发生在不直接连接到终端的子进程中,这就是 make 接收您的击键的原因。

另一件需要注意的事情是:通常,目标文件到可执行阶段(链接)使用一组不同的标志(LDFLAGSLIBS),然后是编译阶段。 在这个简单的示例中,您可以侥幸逃脱,但如果您复制此 makefile 以用于更复杂的情况,则会遇到麻烦。

Running from the makefile is a bit unusual. Are you, perhaps, trying to duplicate the "Compile and Run" Menu item that some IDE provide? Make is not well equipped to do that.

All the stuff that happens in the target commands happens in sub-processes that are not attached directly to the terminal, which is why make receives your key stroke.

Another thing to look at: usually the object-file to executable stage (linking) uses a different set of flags (LDFLAGS and LIBS) then the compile stage. In this simple example you can get away with it, but if you copy this makefile for use in a more complicated case you'll run into trouble.

诠释孤独 2024-07-28 23:43:27

如果您要一遍又一遍地构建和运行,您可以使用 history 命令来帮助解决此问题:

# Run this once
make && ./foo

# Repeat last command
!!

If you're going to build and run over and over, You can use the history command to help with this:

# Run this once
make && ./foo

# Repeat last command
!!
夜夜流光相皎洁 2024-07-28 23:43:27

正如 dmckee 的回答所说, make(1) 正在制作一些东西,而不是为了编译和运行。

当然,没有什么可以阻止您创建一个 shell 别名 make-run 来执行预期的 'make && ./prog args'。

As dmckee's answer said, make(1) is making something, not for compile-and-run.

Of course, nothing stops you for creating a shell alias make-run which does the intended 'make && ./prog args'.

梦开始←不甜 2024-07-28 23:43:27

您可以这样尝试:

APP      = olupxtest

SRCS     = $(wildcard *.cpp)
OBJS     = $(SRCS:.cpp=.o)

CXXFLAGS = -g -fPIC -c
LDFLAGS  =
LIBS     =

.PHONY: all clean

all: clean $(APP) run

$(APP): $(OBJS)
        $(CXX) $(LDFLAGS) $^ $(LIBS) -o $@

clean:
        $(RM) $(OBJS) $(APP)

run:    ${APP}
        ./${APP} ${ARGS}

这里您为目标调用了多个规则: all: clean $(APP) run

You can try like this:

APP      = olupxtest

SRCS     = $(wildcard *.cpp)
OBJS     = $(SRCS:.cpp=.o)

CXXFLAGS = -g -fPIC -c
LDFLAGS  =
LIBS     =

.PHONY: all clean

all: clean $(APP) run

$(APP): $(OBJS)
        $(CXX) $(LDFLAGS) $^ $(LIBS) -o $@

clean:
        $(RM) $(OBJS) $(APP)

run:    ${APP}
        ./${APP} ${ARGS}

Here you have calling multiple rules for target: all: clean $(APP) run

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