判断内存位置是否在CPU缓存中
操作系统可以确定内存页是在 DRAM 还是在交换区中； 例如，简单地尝试访问它，如果发生页面错误，则事实并非如此。
然而，CPU 缓存也能实现同样的效果吗？
是否有任何有效的方法来判断给定的内存位置是否已加载到缓存行中，或者知道它何时加载？
It is possible for an operating system to determine whether a page of memory is in DRAM or in swap; for example, simply try to access it and if a page fault occurs, it wasn't.
However, is the same thing possible with CPU cache?
Is there any efficient way to tell whether a given memory location has been loaded into a cache line, or to know when it does so?
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总的来说，我认为这是不可能的。 它适用于 DRAM 和页面文件，因为这是操作系统管理的资源，缓存由 CPU 本身管理。
操作系统可以对内存读取进行严格的定时循环，并尝试查看它是否足够快地完成以进入缓存，或者是否必须转到主内存 - 这将非常容易出错。
在多核/多进程系统上，处理器之间使用缓存一致性协议来确定何时需要使彼此的缓存无效，我想您可以有一个自定义设备来监听操作系统将查询的该协议。
你想做什么？ 如果您想将某些内容强制写入内存，当前的 x86 处理器支持以非阻塞方式将内存预取到缓存中，例如使用 Visual C++，您可以使用
_mm_prefetch将一行提取到缓存中。编辑：
我自己没有这样做过，所以使用时需要您自担风险。 要确定缓存未命中以进行分析，您可以使用一些特定于体系结构的寄存器。 http://download.intel.com/design/processor/manuals/253669.pdf ，附录A给出了“性能调优事件”。 这不能用于确定单个地址是否在缓存中或何时加载到缓存中，但可用于总体统计信息。 我相信这就是 vTune（这个级别的出色分析器）所使用的。
In general, I don't think this is possible. It works for DRAM and the pagefile since that is an OS managed resource, cache is managed by the CPU itself.
The OS could do a tight timing loop of a memory read and try to see if it completes fast enough to be in the cache or if it had to go out to main memory - this would be very error prone.
On multi-core/multi-proc systems, there are cache coherency protocols that are used between processors to determine when to they need to invalidate each other's caches, I suppose you could have a custom device that would snoop this protocol that the OS would query.
What are you trying to do? If you want to force something into memory, current x86 processors support prefetching memory into the cache in a non-blocking way, for instance with Visual C++ you could use
_mm_prefetchto fetch a line into the cache.EDIT:
I haven't done this myself, so use at your own risk. To determine cache misses for profiling, you may be able to use some architecture-specific registers. http://download.intel.com/design/processor/manuals/253669.pdf, Appendix A gives "Performance Tuning Events". This can't be used to determine if an individual address is in the cache or when it is loaded in the cache, but can be used for overall stats. I believe this is what vTune (a phenomenal profiler for this level) uses.
如果您尝试自己确定这一点，那么运行程序的行为可能会使相关缓存行无效，从而使您的测量变得无用。
这是反映科学原理的案例之一，即您无法在不影响所测量的对象的情况下测量某些东西。
If you try to determine this yourself then the very act of running your program could invalidate the relevant cache lines, hence rendering your measurements useless.
This is one of those cases that mirrors the scientific principle that you cannot measure something without affecting that which you are measuring.
X86
不知道如何判断地址是否在缓存中
但这里是如何判断高速缓存中的地址 WAS
阈值是否必须根据文档或经验来确定，
某些机器具有高速缓存命中/未命中计数器，这同样可以很好地发挥作用
X86
dont know how to tell if address IS in cache
BUT here is how to tell if address WAS in cache
threshold has to be determined from documentation or empirically
some machines have cache hit/miss counters which would serve equally well