按点击付费断点

发布于 2024-07-08 23:04:55 字数 120 浏览 10 评论 0 原文

如何在 PPC 上(具体来说,在 OS X 上)实现断点?

例如,在 x86 上,通常使用 INT 3 指令 (0xCC) 完成——对于 ppc 是否有与此类似的指令? 或者还有其他设置/实施的方式吗?

How is a breakpoint implemented on PPC (On OS X, to be specific)?

For example, on x86 it's typically done with the INT 3 instruction (0xCC) -- is there an instruction comparable to this for ppc? Or is there some other way they're set/implemented?

如果你对这篇内容有疑问,欢迎到本站社区发帖提问 参与讨论,获取更多帮助,或者扫码二维码加入 Web 技术交流群。

扫码二维码加入Web技术交流群

发布评论

需要 登录 才能够评论, 你可以免费 注册 一个本站的账号。

评论(6

猥琐帝 2024-07-15 23:04:55

使用 gdb 和一个十六进制转储自身的函数,我得到 0x7fe00008。 这似乎是 tw 指令

0b01111111111000000000000000001000
  011111                           31
        11111                      condition flags: lt, gt, ge, logical lt, logical gt
             00000                 rA
                  00000            rB
                       0000000100  constant 4
                                 0 reserved

即将 r0 与 r0 进行比较并捕获任何结果。

GDB 反汇编只是 扩展助记符trap

编辑:我正在使用“GNU gdb 6.3.50-20050815(Apple 版本 gdb-696)(10 月星期六) 20 18:20:28 GMT 2007)"

编辑 2:条件断点也可能使用其他形式的 tw twi 如果所需的值已在寄存器中并且调试器不需要跟踪命中计数。

With gdb and a function that hexdumps itself, I get 0x7fe00008. This appears to be the tw instruction:

0b01111111111000000000000000001000
  011111                           31
        11111                      condition flags: lt, gt, ge, logical lt, logical gt
             00000                 rA
                  00000            rB
                       0000000100  constant 4
                                 0 reserved

i.e. compare r0 to r0 and trap on any result.

The GDB disassembly is simply the extended mnemonic trap

EDIT: I'm using "GNU gdb 6.3.50-20050815 (Apple version gdb-696) (Sat Oct 20 18:20:28 GMT 2007)"

EDIT 2: It's also possible that conditional breakpoints will use other forms of tw or twi if the required values are already in registers and the debugger doesn't need to keep track of the hit count.

若能看破又如何 2024-07-15 23:04:55

除了软件断点之外,PPC 还支持硬件断点,通过 IABR(也可能是 IABR2,具体取决于核心版本)寄存器实现。 这些是指令断点,但也有数据断点(用 DABR 实现,也可能用 DABR2 实现)。 如果您的内核支持两组硬件断点寄存器(即存在 IABR2 和 DABR2),您可以做的不仅仅是在特定地址上触发:您可以指定整个连续的地址范围作为断点目标。 对于数据断点,您还可以指定是否希望它们在写入、读取或任何访问时触发。

Besides software breakpoints, PPC also supports hardware breakpoints, implemented via IABR (and possibly IABR2, depending on the core version) registers. These are instructions breakpoints, but there are also data breakpoints (implemented with DABR and, possibly, DABR2). If your core supports two sets of hardware breakpoint registers (i.e. IABR2 and DABR2 are present), you can do more than just trigger on a specific address: you can specify a whole contiguous range of addresses as a breakpoint target. For data breakpoints, you can also specify whether you want them to trigger on write, or read, or any access.

蓝海似她心 2024-07-15 23:04:55

最好的猜测是“tw”或“twi”指令。

您可以深入研究 PPC gdb 的源代码,OS X 可能使用与其 FreeBSD 根源相同的功能。

Best guess is a 'tw' or 'twi' instruction.

You could dig into the source code of PPC gdb, OS X probably uses the same functionality as its FreeBSD roots.

握住你手 2024-07-15 23:04:55

指令断点通常使用 TRAP 指令或与 IABR 调试硬件寄存器。

示例实现:
ArchLinux, 苹果WiiWii U

Instruction breakpoints are typically realised with the TRAP instruction or with the IABR debug hardware register.

Example implementations:
ArchLinux, Apple, Wii and Wii U.

埋情葬爱 2024-07-15 23:04:55

一个可靠的(但目前喝醉了,所以要持保留态度)消息来源告诉我,这是一条非法的零指令,会导致某种系统陷阱。

编辑:制作成社区维基,以防我的朋友喝醉了,他说的都是垃圾:-)

I'm told by a reliable (but currently inebriated, so take it with a grain of salt) source that it's a zero instruction which is illegal and causes some sort of system trap.

EDIT: Made into community wiki in case my friend is so drunk that he's talking absolute rubbish :-)

~没有更多了~
我们使用 Cookies 和其他技术来定制您的体验包括您的登录状态等。通过阅读我们的 隐私政策 了解更多相关信息。 单击 接受 或继续使用网站,即表示您同意使用 Cookies 和您的相关数据。
原文