Question

To restrict interface access within a module, there are modport lists with directions declared within the interface. The keyword modport indicates that the directions are declared as if inside the module.

interface i2;
    wire a, b, c, d;
    modport master (input a, b, output c, d);
    modport slave (output a, b, input c, d);
endinterface

In this example, the modport list name (master or slave) can be specified in the module header, where the interface name selects an interface and the modport name selects the appropriate directional information for the interface signals accessed in the module header.

module m (i2.master i);
    ...
endmodule

module s (i2.slave i);
    ...
endmodule

module top;
    i2 i();
    m u1(.i(i));
    s u2(.i(i));
endmodule

The syntax of interface_name.modport_name reference_name gives a local name for a hierarchical reference. Note that this can be generalized to any interface with a given modport name by writing interface.modport_name reference_name. The modport list name (master or slave) can also be specified in the port connection with the module instance, where the modport name is hierarchical from the interface instance.

module m (i2 i);
    ...
endmodule

module s (i2 i);
    ...
endmodule

module top;
    i2 i();
    m u1(.i(i.master));
    s u2(.i(i.slave));
endmodule

If a port connection specifies a modport list name in both the module instance and module header declaration, then the two modport list names shall be identical.

In a hierarchically nested interface, the directions in a modport declaration can themselves be modport plus name.

interface i1;
    interface i3;
        wire a, b, c, d;
        modport master (input a, b, output c, d);
        modport slave (output a, b, input c, d);
    endinterface
    i3 ch1(), ch2();
    modport master2 (ch1.master, ch2.master);
endinterface

All of the names used in a modport declaration shall be declared by the same interface as is the modport itself. In particular, the names used shall not be those declared by another enclosing interface, and a modport declaration shall not implicitly declare new ports. No hierarchical references shall be permitted within a modport.

The following interface declarations would be illegal:

interface i;
    wire x, y;
    interface illegal_i;
        wire a, b, c, d;
        // x, y not declared by this interface
        modport master(input a, b, x, output c, d, y);
        modport slave(input a, b, x, output c, d, y);
    endinterface : illegal_i
    illegal_i ch1(), ch2();
    modport master2 (ch1.master, ch2.master);
endinterface : i

interface illegal_i;
    // a, b, c, d not declared by this interface
    modport master(input a, b, output c, d);
    modport slave(output a, b, output c, d);
endinterface : illegal_i

Note that if no modport is specified in the module header or in the port connection, then all the nets and variables in the interface are accessible with direction inout or ref, as in the examples above.