Question

A covergroup can contain one or more coverage points. A coverage point can be an integral variable or an integral expression. Each coverage point includes a set of bins associated with its sampled values or its valuetransitions. The bins can be explicitly defined by the user or automatically created by SystemVerilog. The syntax for specifying coverage points is given below.

cover_point ::=         // from Annex A.2.11
    [cover_point_identifer :] coverpoint expression [iff(expression)] bins_or_empty

bins_or_empty ::=
    {{attribute_instance} {bins_or_options;}}
  | ;

bins_or_options ::=
    coverage_option
  | [wildcard] bins_keyword bin_identifier[[[expression]]]={range_list}[iff(expression)]
  | [wildcard] bins_keyword bin_identifier[[]]=trans_list [iff(expression)]
  | bins_keyword bin_identifier[[[expression]]]=default [iff(expression)]
  | bins_keyword bin_identifier = default sequence [iff(expression)]

bins_keyword::= bins | illegal_bins | ignore_bins

range_list ::= value_range {, value_range}

value_range ::=                        // from Annex A.8.3
    expression
  | [expression : expression]

Syntax 20-2—coverpoint syntax (excerpt from Annex A)

A coverage point creates a hierarchical scope, and can be optionally labeled. If the label is specified then it designates the name of the coverage point. This name can be used to add this coverage point to a cross coverage specification, or to access the methods of the coverage point. If the label is omitted and the coverage point is associated with a single variable then the variable name becomes the name of the coverage point. Otherwise, an implementation can generate a name for the coverage point only for the purposes of coverage reporting, that is, generated names cannot be used within the language.

A coverage point can sample the values that correspond to a particular scheduling region (see Section 14) by specifying a clocking block signal. Thus, a coverage point that denotes a clocking block signal will sample the values made available by the clocking block. If the clocking block specifies a skew of #1step, the coverage point will sample the signal values from the Preponed region. If the clocking block specifies a skew of #0, the coverage point will sample the signal values from the Observe region.

The expression within the iff construct specifies an optional condition that disables coverage for that cover point. If the guard expression evaluates to false at a sampling point, the coverage point is ignored. For example:

covergroup g4;
    coverpoint s0 iff(!reset);
endgroup

In the preceding example, cover point s0 is covered only if the value reset is false.

A coverage-point bin associates a name and a count with a set of values or a sequence of value transitions. If the bin designates a set of values, the count is incremented every time the coverage point matches one of the values in the set. If the bin designates a sequence of value transitions, the count is incremented every time the coverage point matches the entire sequence of value transitions.

The bins for a coverage point can be automatically created by SystemVerilog or explicitly defined using the bins construct to name each bin. If the bins are not explicitly defined, they are automatically created by SystemVerilog. The number of automatically created bins can be controlled using the auto_bin_max coverage option. Coverage options are described in Section 20.6.

The bins construct allows creating a separate bin for each value in the given range-list, or a single bin for the entire range of values. To create a separate bin for each value (an array of bins) the square brackets, [], must follow the bin name. To create a fixed number of bins for a set of values, a number can be specified inside the square brackets. The range_list used to specify the set of values associated with a bin shall be constant expressions, instance constants (for classes only) or non-ref arguments to the coverage group.

If a fixed number of bins is specified, and that number is smaller than the number of values in the bin then the possible bin values are uniformly distributed among the specified bins. If the number of values is not divisible by the number of bins then the last bin will include the remaining items. For example:

bins fixed [3] = {1:10};

The 11 possible values are distributed as follows: <1,2,3>, <4,5,6>, <7,8,9,10>. If the number of bins exceeds the number of values then some of the bins will be empty.

The expression within the iff construct at the end of a bin definition provides a per-bin guard condition. If the expression is false at a sampling point, the count for the bin is not incremented.

The default specification defines a bin that is associated with none of the defined value bins. The default bin catches the values of the coverage point that do not lie within any of the defined bins. However, the coverage calculation for a coverage point shall not take into account the coverage captured by the default bin. The default is useful for catching unplanned or invalid values. The default sequence form can be used to catch all transitions (or sequences) that do not lie within any of the defined transition bins (see Section 20.4.1). The default sequence specification does not accept multiple transition bins (the [] notation is not allowed).

bit [9:0] v_a;
covergroup cg @(posedge clk);
    coverpoint v_a
    {
        bins a = { [0:63],65 };
        bins b[] = { [127:150],[148:191] }; // note overlapping values
        bins c[] = { 200,201,202 };
        bins d = { [1000:$] };
        bins others[] = default;
    }
endgroup

In the example above, the first bins construct associates bin a with the values of variable v_a between 0 and 63, and the value 65. The second bins construct creates a set of 65 bins b[127], b[128],...b[191]. Likewise, the third bins construct creates 3 bins: c[200], c[201], and c[202]. The fourth bins construct associates bin d with the values between 1000 and 1023 ($ represents the maximum value of v_a). Every value that does not match bins a, b[], c[], or d[] is added into its own distinct bin.

A default or default sequence bin specification cannot be explicitly ignored (see Section 20.4.4). It shall be an error for bins designated as ignore_bins to also specify a default or default sequence.

Generic coverage groups can be written by passing their traits as arguments to the constructor. For example:

covergroup gc (ref int ra, int low, int high ) @(posedge clk);
    coverpoint ra // sample variable passed by reference
    {
        bins good = { [low : high] };
        bins bad[] = default;
    }
endgroup
...
int va, vb;
cg c1 = new( va, 0, 50 ); // cover variable va in the range 0 to 50
cg c2 = new( vb, 120, 600 ); // cover variable vb in the range 120 to 600

The example above defines a coverage group, gc, in which the signal to be sampled as well as the extent of the coverage bins are specified as arguments. Later, two instances of the coverage group are created; each instance samples a different signal and covers a different range of values.