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29.1 需求	This chapter defines the Coverage Application Programming Interface (API) in SystemVerilog.
29.2 SystemVerilog real-time coverage access	This section describes the mechanisms in SystemVerilog through which SystemVerilog code can query and control coverage information. Coverage information is provided to SystemVerilog by means of a number of built-in system functions (described in Section 29.2.2) using a number of predefined constants (described in Section 29.2.1) to describe the types of coverage and the control actions to be performed.
29.3 FSM recognition	Coverage tools need to have automatic recognition of many of the common FSM coding idioms in Verilog/ SystemVerilog. This standard does not attempt to describe or require any specific automatic FSM recognition mechanisms. However, the standard does prescribe a means by which non-automatic FSM extraction occurs. The presence of any of these standard FSM description additions shall override the tool’s default extraction mechanism. Identification of an FSM consists of identifying the following items: the state register (or expression) the next state register (this is optional) the legal states.
29.4 VPI coverage extensions

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