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18.4 顶层实例

发布于 2020-09-09 22:55:54 字数 988 浏览 929 评论 0 收藏 0

The name $root is added to unambiguously refer to a top level instance, or to an instance path starting from the root of the instantiation tree. $root is the root of the instantiation tree.

For example:

$root.A.B // item B within top instance A
$root.A.B.C // item C within instance B within instance A

$root allows explicit access to the top of the instantiation tree. This is useful to disambiguate a local path (which takes precedence) from the rooted path. In Verilog, a hierarchical path is ambiguous. For example, A.B.C can mean the local A.B.C or the top-level A.B.C (assuming there is an instance A that contains an instance B at both the top level and in the current module). Verilog addresses that ambiguity by giving priority to the local scope, thereby preventing access to the top level path. $root allows explicit access to the top level in those cases in which the name of the top level module is insufficient to uniquely identify the path.

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