- 第一章 SystemVerilog导论
- 第二章 文本值
- 第三章 数据类型
- 第四章 数组
- 第五章 数据声明
- 第六章 属性
- 第七章 操作符与表达式
- 第八章 过程语句和控制流
- 第九章 进程
- 第十章 任务与函数
- 第十一章 类
- 第十二章 随机约束
- 第十三章 进程间的同步与通信
- 第十四章 调度语义
- 第十五章 时钟控制块
- 第十六章 程序块
- 第十七章 断言
- 第十八章 层次
- 第十九章 接口
- 第二十章 覆盖
- 第二十一章 参数
- 第二十二章 配置库
- 第二十三章 系统任务与系统函数
- 23.1 简介(一般信息)
- 23.2 确立时的typeof函数
- 23.3 typename函数
- 23.4 表达式尺寸系统函数
- 23.5 范围系统函数
- 23.6 Shortreal转换
- 23.7 数组查询系统函数
- 23.8 断言严重性系统任务
- 23.9 断言控制系统任务
- 23.10 断言系统函数
- 23.11 随机数系统函数
- 23.12 程序控制
- 23.13 覆盖系统函数
- 23.14 对Verilog-2001系统任务的增强
- 23.15 $readmemb与$readmemh
- 23.16 $writememb and $writememh
- 23.17 File format considerations for multi-dimensional unpacked arrays
- 23.18 System task arguments for multi-dimensional unpacked arrays
- 第二十四章 VCD数据
- 第二十五章 编译器指令
- 第二十六章 考虑从SystemVerilog中删除的功能
- 第二十七章 直接编程接口(DPI)
- 27.1 概述
- 27.2 Two layers of the DPI
- 27.3 Global name space of imported and exported functions
- 27.4 导入的任务和函数
- 27.5 Calling imported functions
- 27.6 Exported functions
- 27.7 Exported tasks
- 27.8 Disabling DPI tasks and functions
- 第二十八章 SystemVerilog断言API
- 第二十九章 SystemVerilog覆盖API
- 29.1 需求
- 29.2 SystemVerilog real-time coverage access
- 29.3 FSM recognition
- 29.3.1 Specifying the signal that holds the current state
- 29.3.2 Specifying the part-select that holds the current state
- 29.3.3 Specifying the concatenation that holds the current state
- 29.3.4 Specifying the signal that holds the next state
- 29.3.5 Specifying the current and next state signals in the same declaration
- 29.3.6 Specifying the possible states of the FSM
- 29.3.7 Pragmas in one-line comments
- 29.3.8 Example
- 29.4 VPI coverage extensions
- 第三十章 SystemVerilog数据读API
- 30.1 简介(一般信息)
- 30.2 需求
- 30.3 Extensions to VPI enumerations
- 30.4 VPI object type additions
- 30.5 Object model diagrams
- 30.6 Usage extensions to VPI routines
- 30.7 VPI routines added in SystemVerilog
- 30.8 Reading data
- 30.9 Optionally unloading the data
- 30.10 Reading data from multiple databases and/or different read library providers
- 30.11 VPI routines extended in SystemVerilog
- 30.12 VPI routines added in SystemVerilog
- 30.12.1 VPI reader routines
- 第三十一章 SystemVerilog VPI Object Model
- 31.1 简介(一般信息)
- 31.2 Instance
- 31.3 Interface
- 31.4 Program
- 31.5 Module (supersedes IEEE 1364-2001 26.6.1)
- 31.6 Modport
- 31.7 Interface tf decl
- 31.8 Ports (supersedes IEEE 1364-2001 26.6.5)
- 31.9 Ref Obj
- 31.9.1 Examples
- 31.10 Variables (supersedes IEEE 1364-2001 section 26.6.8)
- 31.11 Var Select (supersedes IEEE 1364-2001 26.6.8)
- 31.12 Typespec
- 31.13 Variable Drivers and Loads (supersedes IEEE 1364-2001 26.6.23)
- 31.14 Instance Arrays (supersedes IEEE 1364-2001 26.6.2)
- 31.15 Scope (supersedes IEEE 1364-2001 26.6.3)
- 31.16 IO Declaration (supersedes IEEE 1364-2001 26.6.4)
- 31.17 Clocking Block
- 31.18 Class Object Definition
- 31.19 Constraint, constraint ordering, distribution,
- 31.20 Constraint expression
- 31.21 Class Variables
- 31.22 Structure/Union
- 31.23 Named Events (supersedes IEEE 1364-2001 26.6.11)
- 31.24 Task, Function Declaration (supersedes IEEE 1364-2001 26.6.18)
- 31.25 Alias Statement
- 31.25.1 Examples
- 31.26 Frames (supersedes IEEE 1364-2001 26.6.20)
- 31.27 Threads
- 31.28 tf call (supersedes IEEE 1364-2001 26.6.19)
- 31.29 Module path, path term (supersedes IEEE 1364-2001 26.6.15)
- 31.30 Concurrent assertions
- 31.31 Property Decl
- 31.32 Property Specification
- 31.33 Multiclock Sequence Expression
- 31.34 Sequence Declaration
- 31.35 Sequence Expression
- 31.36 Attribute (supersedes IEEE 1364-2001 26.6.42)
- 31.37 Atomic Statement (supersedes IEEE 1364-2001 26.6.27)
- 31.38 If, if else, return, case, do while (supersedes IEEE 1364-2001 26.6.35, 26.6.36)
- 31.39 waits, disables, expect, foreach (supersedes IEEE 1364 26.6.38)
- 31.40 Simple expressions (supersedes IEEE 1364-2001 26.6.25)
- 31.41 Expressions (supersedes IEEE 1364-2001 26.6.26)
- 31.42 Event control (supersedes IEEE 1364-2001 26.6.30)
- 31.43 Event stmt (supersedes IEEE 1364-2001 26.6.27)
- 31.44 Process (supersedes IEEE 1364-2001 26.6.27)
- 31.45 Assignment (supersedes IEEE 1364-2001 26.6.28)
- 附录A 形式语法
- A.1 源文本
- A.2 声明
- A.3 Primitive instances
- A.4 Module, interface and generated instantiation
- A.5 UDP declaration and instantiation
- A.6 Behavioral statements
- A.6.1 Continuous assignment and net alias statements
- A.6.2 Procedural blocks and assignments
- A.6.3 Parallel and sequential blocks
- A.6.4 Statements
- A.6.5 Timing control statements
- A.6.6 Conditional statements
- A.6.7 Case statements
- A.6.8 Looping statements
- A.6.9 Subroutine call statements
- A.6.10 Assertion statements
- A.6.11 Clocking block
- A.6.12 Randsequence
- A.7 Specify section
- A.8 Expressions
- A.9 General
- A.10 Footnotes (normative)
- 附录B 关键字
- 附录C 标准包
- 附录D 链表
- 附录E DPI C-layer
- E.1 概述
- E.2 Naming conventions
- E.3 Portability
- E.4 Include files
- E.5 Semantic constraints
- E.6 Data types
- E.7 Argument passing modes
- E.8 Context tasks and functions
- E.9 Include files
- E.10 Arrays
- E.11 Open arrays
- E.11.1 Actual ranges
- E.11.2 Array querying functions
- E.11.3 Access functions
- E.11.4 Access to the actual representation
- E.11.5 Access to elements via canonical representation
- E.11.6 Access to scalar elements (bit and logic)
- E.11.7 Access to array elements of other types
- E.11.8 Example 4— two-dimensional open array
- E.11.9 Example 5 — open array
- E.11.10 Example 6 — access to packed arrays
- E.11.11 Example 7 — binary compatible calls of exported functions
- 附录F 包含文件
- 附录G 包含外部语言代码
- 附录H 并发断言的形式语义
- 附录I svvpiuser.h
- 附录J 术语表
- 附录K 参考书目
- 其他
第三十一章 SystemVerilog VPI Object Model
主题 | 描述 |
31.1 简介(一般信息) | SystemVerilog extends the Verilog Procedural Interface (VPI) object diagrams to support SystemVerilog constructs. The VPI object diagrams document the properties of objects and the relationships of objects. How these diagrams illustrate this information is explained in Section 26 of the IEEE Std. 1364-2001 Verilog standard. The SystemVerilog extensions to the VPI diagrams are in the form of changes to or additions to the diagrams contained in 1364-2001 Verilog standard. The following table summarizes the changes and additions made to the Verilog VPI object diagrams: Table 31-4: Verilog VPI object diagram changes and additions |
31.2 Instance | NOTES
|
31.3 Interface | NOTE |
31.4 Program | NOTE |
31.5 Module (supersedes IEEE 1364-2001 26.6.1) | |
31.6 Modport | |
31.7 Interface tf decl | NOTE |
31.8 Ports (supersedes IEEE 1364-2001 26.6.5) | NOTES
|
31.9 Ref Obj | |
31.10 Variables (supersedes IEEE 1364-2001 section 26.6.8) | NOTES |
31.11 Var Select (supersedes IEEE 1364-2001 26.6.8) | |
31.12 Typespec | NOTES 1) If the vpiTypedef is TRUE and the typedef creates an alias of another typedef, then the vpiTypedefAlias shall return a non null handle which represents the handle to the aliased typedef. For example: |
31.13 Variable Drivers and Loads (supersedes IEEE 1364-2001 26.6.23) | NOTES 1) vpiDrivers/Loads for a structure, union, or class variable will include the following: — Driver/Load for the whole variable — Driver/Load for any bit/part select of that variable — Driver/Load of any member nested inside that variable 2) vpiDrivers/Loads for any variable array should include the following: — Driver/Load for entire array/vector or any portion of an array/vector to which a handle can be obtained. |
31.14 Instance Arrays (supersedes IEEE 1364-2001 26.6.2) | NOTE 1) Param assignments can only be obtained from non-primitive instance arrays. 2) To obtain all the dimensions of a multi-dimensional array, the range iterator must be used. Using the vpiLeftRange/vpiRightRange properties will only return the last dimension of a multidimensional array. |
31.15 Scope (supersedes IEEE 1364-2001 26.6.3) | NOTE 1: Unnamed scopes shall have valid names, though tool dependent. 2: The vpiImport iterator shall return all objects imported into the current scope via import statements. Note that only objects actually referenced through the import shall be returned, rather than items potentially made visible as a result of the import. Refer to Section 18.2.2 for more details. |
31.16 IO Declaration (supersedes IEEE 1364-2001 26.6.4) | vpiDirection returns vpiRef for pass by ref ports. |
31.17 Clocking Block | |
31.18 Class Object Definition | NOTE
|
31.19 Constraint, constraint ordering, distribution, | |
31.20 Constraint expression | |
31.21 Class Variables | NOTES 1) vpiWaiting/Process iterator on mailbox/semaphores will show the processes waiting on the object: — Waiting process means either frame or task/function handle. 2) vpiMessage iterator shall return all the messages in a mailbox. 3) vpiClassDefn returns the ClassDefn which was used to create the handle. vpiActualDefn returns the ClassDefn that handle object points to when the query is made. The difference can be seen in the example below: class Packet ... endclass : Packet class LinkedPacket extends Packet ... endclass : LinkedPacket LinkedPacket l = new; Packet p = l; In this example, the vpiClassDefn of variable "p" is... more |
31.22 Structure/Union | NOTES vpi_get_value/vpi_put_value cannot be used to access values of entire unpacked structures and unpacked unions. |
31.23 Named Events (supersedes IEEE 1364-2001 26.6.11) | NOTE The new iterator (vpiWaitingProcesses) returns all waiting processes, identified by their frame, for that named event. NOTE vpi_iterate(vpiIndex, named_event_handle) shall return the set of indices for a named event within an array, starting with the index for the named event and working outward. If the named event is not part of an array, a NULL shall be returned. |
31.24 Task, Function Declaration (supersedes IEEE 1364-2001 26.6.18) | NOTE 5) A Verilog HDL function shall contain an object with the same name, size, and type as the function. 6) vpiInterfaceTask/vpiInterfaceFunction shall be true if task/function is declared inside an interface or a modport of an interface. 7) For function where return type is a user-defined type, vpi_handle (vpiReturn,Function_handle) shall return the implicit variable handle representing the return of the function from which the user can get the details of that user-defined type. 8) vpiReturn will always return a var object, even for simple returns. |
31.25 Alias Statement | |
31.26 Frames (supersedes IEEE 1364-2001 26.6.20) | NOTES 1) The following callbacks shall be supported on frames: — cbStartOfFrame: triggers whenever any frame gets executed. — cbEndOfFrame: triggers when a particular thread is deleted after all storage is deleted. |
31.27 Threads | NOTES The following callbacks shall be supported on threads — cbStartOfThread: triggers whenever any thread is created — cbEndOfThread: triggers when a particular thread gets deleted after storage is deleted. — cbEnterThread: triggers whenever a particular thread resumes execution |
31.28 tf call (supersedes IEEE 1364-2001 26.6.19) | NOTE: 1) the vpiWith relation is only available for randomize methods (see Section 12.6) and for array locator methods (see Section 4.15.1). 2) For methods (method func call, method task call), the vpiPrefix relation will return the object to which the method is being applied. For example, for the class method invocation packet.send(); the prefix for the "send" method is the class var "packet" |
31.29 Module path, path term (supersedes IEEE 1364-2001 26.6.15) | NOTE: 1) specify blocks can occur in both modules and interfaces. For backwards compatibility the vpiModule relation has been preserved; however this relation will return NULL for specify blocks in interfaces. For new code it is recommended that the vpiInstance relation be used instead. |
31.30 Concurrent assertions | NOTE Clocking event is always the actual clocking event on which the assertion is being evaluated, regardless of whether this is explicit or implicit (inferred) |
31.31 Property Decl | |
31.32 Property Specification | NOTE Variables are declarations of property variables. You cannot get the value of these variables. NOTES: 1. within the context of a property expr, vpiOpType can be any one of vpiNotOp, vpiImplyOp, vpiDelayedImplyOp, vpiAndOp, vpiOrOp, vpiIfOp, vpiIfElseOp Operands to these operations will be provided in the same order as show in the BNF. |
31.33 Multiclock Sequence Expression | |
31.34 Sequence Declaration | NOTE: the vpiArgument iterator shall return the sequence instance arguments in the order that the formals for the sequence are declared, so that the correspondence between each argument and its respective formal can be made. If a formal has a default value, that value will appear as the argument should the instantiation not provide a value for that argument. |
31.35 Sequence Expression | Notes: 2. Within a sequence expression, vpiOpType can be any one of vpiAndOp, vpiIntersectOp, vpiOr, vpiFirstMatchOp, vpiThroughoutOp, vpiWithinOp, vpiUnaryCycleDelayOp, vpiCycleDelayOp, vpiRepeatOp, vpiConsecutiveRepeatOp or vpiGotoRepeatOp. 3. For operations, the operands are provided in the same order as the operands appear in BNF, with the following exceptions: vpiUnaryCycleDelayOp: arguments will be: sequence, left range, right range. Right range will only be given if different than left range. vpiCycleDelayOp: argument will be: LHS sequence, rhs sequence, left range, right range. Right range will only be provided if different than left range. all the repeat operators: the first argument will be the sequence being... more |
31.36 Attribute (supersedes IEEE 1364-2001 26.6.42) | |
31.37 Atomic Statement (supersedes IEEE 1364-2001 26.6.27) | |
31.38 If, if else, return, case, do while (supersedes IEEE 1364-2001 26.6.35, 26.6.36) | |
31.39 waits, disables, expect, foreach (supersedes IEEE 1364 26.6.38) | |
31.40 Simple expressions (supersedes IEEE 1364-2001 26.6.25) | |
31.41 Expressions (supersedes IEEE 1364-2001 26.6.26) | NOTES: 1) For an operator whose type is vpiMultiConcat, the first operand shall be the multiplier expression. The remaining operands shall be the expressions within the concatenation. 2) The property vpiDecompile will return a string with a functionally equivalent expression to the original expression within the HDL. Parenthesis shall be added only to preserve precedence. Each operand and operator shall be separated by a single space character. No additional white space shall be added due to parenthesis. 3) New vpiOpTypes: vpiInsideOp, vpiMatchOp, vpiCastOp, vpiPreIncOp, vpiPostIncOp, vpiPreDecOp, vpiPostDecOp, vpiIffOp, vpiCycleDelayOp. The cast operation is represented as a unary operation, with its... more |
31.42 Event control (supersedes IEEE 1364-2001 26.6.30) | NOTE—For event control associated with assignment, the statement shall always be NULL. |
31.43 Event stmt (supersedes IEEE 1364-2001 26.6.27) | |
31.44 Process (supersedes IEEE 1364-2001 26.6.27) | NOTE- vpiAlwaysType can be one of: vpiAlwaysComb, vpiAlwaysFF, vpiAlwaysLatch |
31.45 Assignment (supersedes IEEE 1364-2001 26.6.28) | NOTE: vpiOpType will return vpiAssignmentOp for normal non-blocking ’=’ assignments, and the operator combined with the assignment for the operators described in section 7.3. For example, the assignment |
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