Question

Table E-1 defines the mapping between the basic SystemVerilog data types and the corresponding C types.

Table E-1: Mapping data types

?Encodings for bit and logic are given in file svdpi.h. Refer to Annex E.9.1.1.

The DPI interface also supports the SystemVerilog and C unsigned integer data types that correspond to the mappings Table E-1 shows for their signed equivalents.

Note that input mode arguments of type byte unsigned and shortint unsigned are not equivalent to bit[7:0] or bit[15:0], respectively, since the former are passed as C types unsigned char and unsigned short and the latter are passed as C unsigned int (i.e., svBitVec32). A similar lack of equivalence applies to passing such parameters by reference for output and inout modes.

The representation of SystemVerilog-specific data types like packed bit and logic arrays is implementation-dependent and generally transparent to the user. Nevertheless, for the sake of performance, applications can be tuned for a specific implementation and make use of the actual representation used by that implementation; such applications shall not be binary compatible, however.